Optoelectronic devices are used in many applications including telecommunications, data storage and signalling. Certain types of optoelectronic devices such as laser diodes, optoelectronic modulators, semiconductor optical amplifiers, semiconductor gain media, etc., have an active region located in an optical waveguide. The optical waveguide typically incorporates different structures to guide the light laterally, i.e., parallel to the major surface of the substrate on which the device is fabricated, and transversely, i.e., orthogonal to the major surface of the substrate. In the transverse direction, the light is guided by a refractive index contrast between the semiconductor material of the active region and cladding layers between which the active layer is sandwiched. In the lateral direction, the light is guided by a ridge waveguide structure or a buried heterostructure waveguide defined at least in part in the layer structure of which the cladding layers and the active region form part.
In telecommunications applications, the most commonly used lateral waveguide structure is the buried heterostructure. A buried heterostructure provides advantages over a ridge waveguide structure because of the large refractive index contrast it provides at the active region. This allows the optical waveguide to be made very narrow, while preserving a high spatial overlap between the fundamental optical mode and the active region. This provides such advantages as a low threshold current in lasers, a lower operating current in semiconductor optical amplifiers and optical gain media, and a low capacitance, and, hence, increased modulation speed, in optoelectronic modulators and directly modulated lasers.
A typical process for fabricating optoelectronic devices incorporating a buried heterostructure lateral waveguide is illustrated in FIGS. 1A-1C. First, a layer structure 10 from which hundreds or thousands of optoelectronic devices are made is grown. FIGS. 1A-1C are side views of a portion of layer structure 10 in which a single optoelectronic device is fabricated. FIG. 1A shows an n-type cladding layer 12, an undoped active region 14 and a p-type cladding layer 16 grown on a substrate 18. The layers are grown by metal organic chemical vapor deposition (MOCVD), also known in the art as organo-metallic vapor phase epitaxy (OMVPE).
The materials of layer structure 10 are Group III-V semiconductors typically composed of such elements as indium, gallium, arsenic and phosphorus. The semiconductor material of cladding layers 12 and 16 has a lower refractive index than that of active region 14. The thickness of n-type cladding layer 12 is about 2 μm, whereas the thickness of p-type cladding layer 16 in layer structure 10 is only about 200 nm-400 nm.
A quantum well structure 20 composed of one or more quantum wells is located in active region 14. Each quantum well is defined by a quantum well layer of low band-gap semiconductor material sandwiched between barrier layers of higher band-gap semiconductor material.
FIG. 1A also shows a mask 22 deposited on the surface of p-type cladding layer 16. The material of the mask is typically silicon dioxide. Mask 22 is elongate in the y-direction shown in FIG. 1A, and is typically about 1-8 μm wide.
Layer structure 10 is then removed from the growth chamber and is subject to two etching processes that define a mesa 24 in the layer structure, as shown in FIG. 1B. A reactive ion etch (RIE) is initially used to remove portions of p-type cladding layer 16, active region 14 and n-type cladding layer 12 not protected by mask 22. The RIE damages the edges of the layers subject to etching. Such damaged edges significantly impair the efficiency of the finished optoelectronic device. Accordingly, layer structure 10 is additionally subject to a wet etch that removes the damaged edges of p-type cladding layer 16, active region 14 and n-type cladding layer 12. The wet etch process additionally defines the overhang of mask 22 relative to mesa 24. FIG. 1B shows layer structure 10 after both etching processes have been performed.
Layer structure 10 is then returned to the growth chamber, and an overgrowth 26 of a high resistivity group III-V semiconductor material having a lower refractive index than the materials of active region 14 is epitaxially grown on the layer structure by MOCVD, as shown in FIG. 1C. The overgrowth grows on the exposed surface of substrate 18 and on the sidewalls of mesa 24, but does not grow on mask 22. Accordingly, overgrowth 26 fills the cavities etched into the layer structure between adjacent mesas. Deposition of the overgrowth continues until its growth surface reaches the top surface of p-type cladding layer 16.
In an embodiment of layer structure 10 in which the material of cladding layers 12 and 16 is indium phosphide (InP), a typical material of overgrowth 26 is indium phosphide doped with iron (InP:Fe). The refractive index of the overgrowth material is about 0.2 less than that of the materials of active region 14. The overgrowth material is doped with iron (Fe) to reduce its conductivity.
Layer structure 10 is then removed from the growth chamber and is subject to another wet etch process that removes the mask 22 from the surface of p-type cladding layer 16.
Layer structure 10 is then returned to the growth chamber, where additional p-type cladding layer material 28 is grown over the exposed surfaces of p-type cladding layer 16 and overgrowth 26, as shown in FIG. 1C. P-type cladding layer 16 and the portion of the additional p-type cladding layer material grown on p-type cladding layer 16 collectively constitute p-type cladding layer 30. P-type cladding layer typically has a thickness about the same as that of n-type cladding layer 12, i.e., about 2 μm.
A p-contact layer (not shown) is grown on top of p-type cladding layer 30, and electrode layers (not shown) are deposited on the bottom surface of substrate 18 and the exposed surface of the p-contact layer. The electrode layers are then patterned to define electrodes. Layer structure 10 is then singulated into individual optoelectronic devices.
Although the above-described buried heterostructure waveguide provides performance advantages, the above-described fabrication process is complex and is difficult to control. In particular, it is essential to etch the layer structure using a low-damage etch process, since the etch proceeds through the p-i-n junction formed by layers of p-type, undoped and n-type material (not shown) in active region 14. It is highly undesirable to have carrier states associated with structural defects in the etched sidewalls of the mesa. Moreover, the width of active region 14, i.e., the dimension of the active region in the x-direction shown in FIG. 1A, is defined by the etch process. The width of the active region has to be accurately defined: too narrow an active region results in insufficient gain or too high a threshold current. Too wide an active region allows the optoelectronic device to operate in multiple optical modes, which is undesirable in many applications. Finally, the undercut profile of mesa 24 relative to mask 22 must also be accurately controlled to ensure that overgrowth 26 provides a reasonably planar surface on which to grow the additional p-type cladding layer material 28.
Optoelectronic devices for use in long wavelength telecommunications applications originally had indium gallium arsenide phosphide (InGaAsP) as the material of the quantum well layers. Using aluminum indium gallium arsenide (AlInGaAs) instead of InGaAsP as the material of the quantum well layers improves the high temperature characteristics of the optoelectronic device. However, using AlInGaAs as the material of the quantum well layers makes fabrication of the buried heterostructure waveguide structure considerably more difficult. This is because the presence of aluminum in the material of the quantum well layers leads to the formation of a stable layer of oxide on the sidewall of the mesa 24 during the wet etch. Unlike the less-stable oxides of indium and gallium formed when InGaAsP is etched, aluminum oxide cannot be thermally desorbed in the MOCVD growth chamber prior to growing overgrowth 26. Instead, the aluminum oxide layer persists on the sidewalls of the mesa, and degrades the quality of the interface between the mesa and overgrowth 26.
The problem of damage to the exposed sidewalls of the mesa 24 is exacerbated by the need to transfer the wafer from the etch station to the growth chamber after the etch process has been performed. The exposes the sidewalls of the mesa to ambient air, which typically contains water vapor and oxygen. The water vapor and oxygen can cause additional oxide formation on the sidewalls of the mesa.
Various approaches have been proposed to deal with the problem of stable aluminum oxides forming on the sidewalls of the mesa. For example, in-situ etching may be used, as described by Bertone et al. in Etching of InP-based MQW Structure in a MOCVD Reactor by Chlorinated Compounds, 195 J. CRYST. GROWTH, 624 (1998). However, such approaches are expensive and difficult to implement, and may be incompatible with fabrication processes for other devices.
In Densely Arrayed Eight-Wavelength Semiconductor Lasers Fabricated by Microarray Selective Epitaxy, 5 IEEE J. SEL. TOP. QUANTUM ELECTRON., 428 (1999), K. Kudo et al. disclose a process for fabricating an array of buried heterostructure lasers using micro-selective area growth. This process is illustrated in FIGS. 2A-2C. FIG. 2A shows a substrate 68 on which an n-type cladding layer 62 has been grown. An optical waveguide core mesa 80 that additionally constitutes the active region 64 of the optoelectronic device is then grown by micro-selective area growth on the surface of n-type cladding layer 62. The optical waveguide core mesa is grown in an elongate window 82 defined by two elongate mask patterns 84. The optical waveguide core mesa has a trapezoidal cross-sectional shape, and is elongate in the y-direction shown.
Using micro-selective area growth to fabricate an optical waveguide core mesa that includes the active region of a buried heterostructure laser improves the dimensional accuracy of the active region. Additionally, using micro-selective area growth forms the optical waveguide core mesa without the need to etch through the active region. However, a second micro-selective area growth process is used to cover optical waveguide core mesa 80 with p-type cladding material. The second micro-selective area growth process involves removing the wafer from the growth chamber and etching mask patterns 84 to increase the width of window 82. FIG. 2B shows narrowed mask patterns 88 and widened window 86 resulting from etching the mask patterns 84 shown in FIG. 2A.
The wafer is then returned to the growth chamber and a p-type cladding mesa 90 is grown over optical waveguide core mesa 80, as shown in FIG. 2C Cladding mesa 90 is grown by micro-selective area growth in the widened window 86 defined by narrowed mask patterns 88 on the surface of n-type cladding layer 62. Cladding mesa 90 has a trapezoidal cross-sectional shape and covers the sidewalls and top surface of optical waveguide core mesa 80.
Accordingly, although using micro-selective area growth to fabricate a buried heterostructure optoelectronic device obviates the need to etch through the active region itself, using a micro-selective area growth process that involves an intervening etch process, as disclosed by Kudo et al., does not provide a complete solution to the problems described above. The need to remove the wafer from the growth chamber to etch the mask patterns exposes the sidewalls of the optical waveguide core mesa to ambient air and, hence, to the possibility of stable oxide formation or other damage to the sidewalls. Additionally, the sidewalls of the optical waveguide core mesa are exposed to the etchant used to etch the mask patterns. This can result in stable oxide formation on, or other damage to, the sidewalls of the optical waveguide core mesa, especially when the quantum well structure contains aluminum. The devices disclosed by Kudo et al. had quantum well layers of InGaAsP.
Moreover, the optoelectronic devices fabricated by the process disclosed by Kudo et al. have a high inter-electrode capacitance because an appreciable area of cladding mesa 90 abuts n-type cladding layer 62. Finally, cladding mesa 90 has a relatively narrow top surface on which it is difficult to form the p-contact electrode.
Further, in many applications it is desirable to use a distributed feedback (DFB) laser for its spectral purity and single mode output characteristics. However, fabricating a DFB laser is challenging because a diffraction grating structure must be formed in the vicinity of the active region. Typically, the grating is formed over the layers that comprise the active region of the device. When fabricating a laser device using the micro-selective area growth (μSAG) technique described in above-identified U.S. patent application Ser. No. 10/787,349, the diffraction grating must be formed under the active region. Forming the diffraction grating under the active region is difficult because it is difficult to planarize the surface of the grating so that the layers that form the active region can be grown over the diffraction grating.
Thus, what is needed is a way of fabricating optical waveguides and optoelectronic devices incorporating a buried heterostructure lateral waveguide structure that does not have the disadvantages of the buried heterostructure fabrication processes described above and that can be used to fabricate a DFB laser, or another device that uses distributed feedback. What is also needed is a way of fabricating buried heterostructure optical waveguides and optoelectronic devices whose optical waveguide cores include aluminum. Finally, what is needed are optical waveguides and optoelectronic devices incorporating a buried heterostructure lateral waveguide structure that does not have the disadvantages of the buried heterostructure lateral waveguide structures described above.